LLNL researchers have developed additive manufactured fuel targets for IFE.  They have been successful in using TPL to fabricate low density (down to 60 mg/cm3) and low atomic number (CHO) polymeric foams for potential targets, and some have been tested at the OMEGA Laser Facility. With TPL, LLNL researchers have also been able to fabricate a full fuel capsule with diameter of ~1 mm or…

The approach is to use appropriately doped semi-insulating gallium nitride to provide a high damage tolerant photoconductor with high responsivity to various pump wavelength light.  Mn, C, or Fe are used as dopants to provide a source of electrons or holes that can be excited.  This is combined with the use of dichroic antireflection coating at the GaN/polyimide/liquid crystal…

The approach is to use quantitative phase imaging (QPI) using a common-path phase-shifting interferometry technique.  A sequence of four phase shifts with an increment of π/2 between unscattered reference beam and scattered sample beam are imparted by a spatial light modulator.  A quantitative phase image is retrieved from four raw intensity images.  QPI is a highly sensitive…

LLNL’s novel approach is to use Direct Ink Write (DIW) with a co-extrusion nozzle to enable the extrusion of multiple materials as one coil.  With this method, LLNL researchers were able to produce an insulating wire that is composed of three different materials, axial conducting and insulating from its inner core to its outer sheath.  After heat treatment, the printed wireI was then…

Beam Element-based Topology Optimization (“BETO”) is one of the conventional ways to design microstructures.  It starts with an initial design that is composed of many beam elements.  LLNL’s invention uses accurate Component-wise Reduced Order Models (“CWROM”) rather than the inaccurate beam elements.  In doing so, the process becomes computationally efficient and fast, as each…

LLNL’s approach to designing logic gates uses heuristic as well as with the Freedom and Constraint Topologies (FACT) methods; these gates are then produced using existing additive manufacturing processes.  The 10,122,365 and 10,678,293 patents describe how to fabricate the gates; the