Analog signals can be digitized using real-time sampling technology or equivalent time sampling technology. Real-time sampling technology typically samples an entire waveform on each trigger event so that a large number of data points are captured. Real-time sampling can be triggered by an external trigger signal or based on a feature of the data itself such as when waveform's amplitude reaches a certain threshold. Real time sampling is often limited by the sampling rate of the capturing device, as faithful reproduction of the waveform requires a sampling rate that is at least twice the highest frequency of the waveform. For real-time sampling technology, an analog signal is digitized in two stages: discretization and quantization. Discretization is a process of dividing the signal into intervals of time, and each interval is represented by a single measurement of amplitude. During quantization, each amplitude measurement may be approximated by a value from a finite set.
LLNL's method of equivalent time sampling incorporates an embedded system that generates the pulses used to trigger the external circuit and the data acquisition (DAQ). This removes the external reference clock, allowing the overall system clock rate to change based on the ability of the embedded system. The time delays needed to create the time stepping for equivalent time sampling is done by using 3 COTS digital delay chips wired in series. Each chip can perform 10ps steps over a 10 ns of sweep time resulting in a total sweep time over 30 ns and a cycle-to-cycle jitter of 6 ps. The delay chips are programmed through the embedded system's general purpose IO.
Each unit contains one embedded system and one delay generator board. The module can operate in two different modes as either master or slave. In master, the system generates a trigger pulse and propagates the pulse through the delay path to trigger the external circuit and DAQ. The trigger pulse can also be output on an EXT trigger line so that it can be sent to other modules. This can be done either wired or wirelessly. In slave mode, the system uses an EXT trigger input line to trigger the DAQ and to send an interrupt to the embedded system to start the DAQ conversion process. In this mode, the unit generates no triggers as they are generated externally.
A benefit of the disclosed equivalent time sampling systems is that the reference clock is removed, thus allowing the overall system clock rate to change based on the ability of the embedded system. The pulses are generated when the embedded system is ready to receive data from the ADC.
Another benefit of the disclosed equivalent time sampling systems is the ability to provide a modular implementation, which allows the equivalent time sampling systems to be used for multiple applications.
Yet, another benefit of the disclosed equivalent time sampling systems is that they simplify DAQ system design by not requiring the use of a reference clock. In systems that rely on a reference clock, the remaining components of the equivalent time sampling system are often designed based on, and are limited by, the reference clock and its characteristics. Thus, eliminating the reference clock improves the flexibility of the design which can lead to an improved performance, as well as cost and space savings. Such considerations are especially important for space/cost limited implementations in, for example, systems that are used in drones or unmanned aerial vehicles (UAVs).
Equivalent time sampling is used to digitize a repeatable signal with GHz bandwidth but with DAQs that run at much slower rates.
In LLNL's application for GPR, the propagation delay between trigger sources and remote DAQ is determined by using a high-accuracy positioning system to calculate time-of-flight for wireless applications. For wired applications, the delay of the cables can be measured or a calibration can be completed to determine path delay; the delays are then programmed into the embedded systems.
LLNL has filed a patent application for this invention.