For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process. The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer. The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual…
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LLNL has developed a method of extending device lifetimes by imprinting into the device a shape that excludes specific vibrational modes, otherwise known as a phononic bandgap. Eliminating these modes prevents one of the primary energy loss pathways in these devices. LLNL’s new method enhances the coherence of superconducting circuits by introducing a phononic bandgap around the system’s…
Recent advancements in additive manufacturing, also called 3D printing, allow precise placement of materials in three dimensions. LLNL researchers have invented mechanical logic gates based on flexures that can be integrated into the microstructure of a micro-architected material through 3D printing. The logic gates can be combined into circuits allowing complex logic operations to be…