For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process. The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer. The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual silicon…
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Technology Portfolios
Recent advancements in additive manufacturing, also called 3D printing, allow precise placement of materials in three dimensions. LLNL researchers have invented mechanical logic gates based on flexures that can be integrated into the microstructure of a micro-architected material through 3D printing. The logic gates can be combined into circuits allowing complex logic operations to be…
The LLNL method for optimizing as built optical designs uses insights from perturbed optical system theory and reformulates perturbation of optical performance in terms of double Zernikes, which can be calculated analytically rather than by tracing thousands of rays. A new theory of compensation is enabled by the use of double Zernikes which allows the performance degradation of a perturbed…