For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process. The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer. The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual silicon…
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The LLNL method for optimizing as built optical designs uses insights from perturbed optical system theory and reformulates perturbation of optical performance in terms of double Zernikes, which can be calculated analytically rather than by tracing thousands of rays. A new theory of compensation is enabled by the use of double Zernikes which allows the performance degradation of a perturbed…
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LLNL has developed a compact and low-power cantilever-based sensor array, which has been used to detect various vapor-phase analytes. For further information on the latest developments, see the article "Sniffing the Air with an Electronic Nose."