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Schematic of six-ring design for IL-13352

This LLNL invention proposes a new microstructured large mode area fiber design that enhances the confinement of the core mode while strongly suppressing thermal or scattering mediated dynamic couplings with higher order modes thought to be responsible for generating undesirable Transverse Mode Instabilities. The design accomplishes higher order mode suppression and core mode confinement by…

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SEM image of a prototype for a neural implant shuttle etched into a non-SOI wafer. The 7:1 (Si:Photoresist) etch selectivity used here allowed for a maximum structure height of 32 μm, with up to 75 steps of 0.4 μm height each. Scale bar 100 μm.

For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process.  The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer.  The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual…

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grating_optic2

Livermore Lab's SBC grating optics benefit from the combination of the following key technologies:

  • LLNL proprietary optical coating designs utilizing >100 thin film layers – enables ultra-low-loss, ppm transmission levels through the coating, high diffraction efficiency, and large bandwidth.
  • LLNL proprietary dispersive surface relief structure…