For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process.  The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer.  The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual silicon…

LLNL's method of equivalent time sampling incorporates an embedded system that generates the pulses used to trigger the external circuit and the data acquisition (DAQ). This removes the external reference clock, allowing the overall system clock rate to change based on the ability of the embedded system. The time delays needed to create the time stepping for equivalent time sampling is done by…

LLNL has developed a compact and low-power cantilever-based sensor array, which has been used to detect various vapor-phase analytes. For further information on the latest developments, see the article "Sniffing the Air with an Electronic Nose."