For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process.  The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer.  The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual…

The approach is to build a high voltage insulator consisting of two materials:  Poly-Ether-Ether-Ketone (“PEEK”) and Machinable Ceramic (“MACOR”).  PEEK has a high stress tolerance but cannot withstand high temperatures, while MACOR has high heat tolerance but is difficult to machine and can be brittle.  MACOR is used for the plasma-facing surface, while PEEK will handle the…