This portfolio was organized to group innovations that might not be categorized in the other portfolios. Instruments are full systems integrated to perform complex electrical or mechanical work. Sensors are devices that detect, measure, or locate a physical property. Electronics are devices that manipulate electrons or control electrical energy, and the manufacturing processes that fabricate them.
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Decades of cutting-edge laser, optics and plasma physics research at Lawrence Livermore National Laboratory (LLNL) played a key role in the underlying science that the semiconductor industry uses to manufacture advanced microprocessors. Now a new research partnership led by LLNL aims to lay the groundwork for the next evolution of extreme ultraviolet (EUV) lithography, centered around a Lab-developed driver system dubbed the Big Aperture Thulium (BAT) laser.
LLNL plasma physicists, Brendan Reagan and Jackson Williams, are the project’s co-lead principal investigators. The project includes scientists from SLAC National Accelerator Laboratory; ASML San Diego; and the Advanced Research Center for Nanolithography (ARCNL), a public-private research center based in the Netherlands.
Funded through DOE’s Unlocking Lasting Transformative Resiliency Advances by Faster Actuation of power Semiconductor Technologies (ULTRAFAST) program, LLNL researchers (in Engineering) will develop an optically-controlled semiconductor transistor to enable future grid control systems to accommodate higher voltage and current than state-of-the-art devices. (Award amount: $3,000,000) while LLNL licensee Opcondys will develop a light-controlled grid protection device to suppress destructive, sudden transient surges on the grid such as those caused by lightning and electromagnetic pulses. (Award amount: $3,178,977)
The Department of Energy’s Technology Transfer Working Group recently awarded two Lawrence Livermore National Laboratory (LLNL) employees with “Best in Class” awards during their May spring meeting in Washington, D.C.
For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process. The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer. The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual…