LLNL researchers have devised a set of design principles that facilitates the development of practical TPMS-based two fluid flow reactors.; included in the design are these new concepts:
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- Photoconductive Semiconductor Switches (PCSS) (9)
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LLNL researchers have invented an ultrafast PCSS to drive a high-power laser diode with arbitrary pulse widths. These devices operate by supplying a high voltage (>10 kV) to one side of the switch. A short pulse of light illuminates the semiconductor, instantly turning it from highly resistive to highly conductive. Ultrawide bandgap (UWBG) semiconductors are used to achieve sub-…

LLNL’s novel approach is to use diamond substrates with the desired donor (nitrogen) and acceptor (boron) impurities. In order to optically activate these deep impurities, the invention requires at least one externally or internally integrated light source. The initial exposure to light can set up the desired conduction current, after which the light source could be turned…
![Filled (8,8) (left) and (15,15) (right) CNTs with [EMIM+][BF4- ] using SGTI with the proposed spliced soft-core potential (SSCP) approach](/sites/default/files/styles/scale_exact_400x400_/public/2023-10/Filled%20CNTs%20using%20SGTI.png?itok=Dy0ObN7i)
LLNL researchers have developed a novel simulation methodology using slow growth thermodynamic integration (SGTI) utilizing spliced soft-core interaction potential (SSCP). The approach to filling the molecular enclosures is a nonphysical one. Rather than filling the pores from the open ends this method creates steps in the algorithm that allow molecules to pass through the pore…

Instead of producing individual DSRDs and bonding them, Tunnel DSRD's entire stack structure is grown epitaxially on a n- or p-type silicon wafer, resulting in a novel, “monolithic” stacked DSRD. A tunnel diode is essentially a diode with very highly doped p and n regions such that the reverse breakdown voltage is 200 meV or lower.

For cooling a high power device, the novel approach is to use a thermoelectric cooler (TEC)-based embedded substrate with proper selection of the TEC material as an active cooler. The packaging configuration of TEC allows cooling the entire die without the use of a fluid. The process is compatible with the thin film TEC material. Standard semiconductor processes can be used…

For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process. The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer. The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual…

The approach is to use Charge Balance Layers (CBLs) to create a superjunction device in wide bandgap materials. These CBLs enable the device to effectively spread the electric field over 2- or 3-dimensions within a semiconductor voltage sustaining layer instead of 1-dimension, thereby increasing the maximum voltage a device is capable of withstanding. The challenge of using CBLs is…

By combining 3D printing and dealloying., researchers at LLNL have developed a method for fabricating metal foams with engineered hierarchical architectures consisting of pores at least 3 distinct length scales. LLNL’s method uses direct ink writing (DIW), a 3D printing technique for additive manufacturing to fabricate hierarchical nanoporous metal foams with deterministically controlled 3D…

To overcome limitations with cellular silicone foams, LLNL innovators have developed a new 3D energy absorbing material with tailored/engineered bulk-scale properties. The energy absorbing material has 3D patterned architectures specially designed for specific energy absorbing properties. The combination of LLNL's capabilities in advanced modeling and simulation and the additive…