LLNL’s Distributed Implicit Neural Representation (DINR) is a novel approach to 4D time-space reconstruction of dynamic objects. DINR is the first technology to enable 4D imaging of dynamic objects at sufficiently high spatial and temporal resolutions that are necessary for real world medical and industrial applications.
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LLNL researchers have developed a Li-Sn-Zn ternary alloy and its method of production. Instead of traditional alloying techniques, the alloy was synthesized using mechanical alloying (high energy ball milling). With high purity elemental powders of lithium, tin and zinc, LLNL researchers were able to prepare Li60Sn20Zn20 as well as Li70Sn20Zn10 nanopowders.
LLNL researchers have invented an ultrafast PCSS to drive a high-power laser diode with arbitrary pulse widths. These devices operate by supplying a high voltage (>10 kV) to one side of the switch. A short pulse of light illuminates the semiconductor, instantly turning it from highly resistive to highly conductive.
LLNL’s novel approach is to use diamond substrates with the desired donor (nitrogen) and acceptor (boron) impurities. In order to optically activate these deep impurities, the invention requires at least one externally or internally integrated light source. The initial exposure to light can set up the desired conduction current, after which the light source could be turned…
Instead of producing individual DSRDs and bonding them, Tunnel DSRD's entire stack structure is grown epitaxially on a n- or p-type silicon wafer, resulting in a novel, “monolithic” stacked DSRD. A tunnel diode is essentially a diode with very highly doped p and n regions such that the reverse breakdown voltage is 200 meV or lower.
CMI—a DOE Energy Innovation Hub—is a public/private partnership led by the Ames Laboratory that brings together the best and brightest research minds from universities, national laboratories (including LLNL), and the private sector to find innovative technology solutions to make better use of materials critical to the success of clean energy technologies as well as develop resilient and secure…
For cooling a high power device, the novel approach is to use a thermoelectric cooler (TEC)-based embedded substrate with proper selection of the TEC material as an active cooler. The packaging configuration of TEC allows cooling the entire die without the use of a fluid. The process is compatible with the thin film TEC material. Standard semiconductor processes can be used…
For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process. The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer. The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual…
The approach is to use Charge Balance Layers (CBLs) to create a superjunction device in wide bandgap materials. These CBLs enable the device to effectively spread the electric field over 2- or 3-dimensions within a semiconductor voltage sustaining layer instead of 1-dimension, thereby increasing the maximum voltage a device is capable of withstanding. The challenge of using CBLs is…
The LiDO code combines finite element analysis, design sensitivity analysis and nonlinear programming in a High-Performance Computing (HPC) environment that enables the solution of large-scale structural optimization problems in a computationally efficient manner. Currently, the code uses topology optimization strategies in which a given material is optimally distributed throughout the domain…