LLNL has developed a method that adds a polyamine based crosslinker and an acid receptor, based on MgO nanoparticles into a polymer bonded PBX, where the polymer binder is a fluoropolymer containing vinylidene difluoride functionality.  Crosslinking kinetics can then be controlled by selecting an appropriate amine structure, pressing temperature and optionally the addition of a chemical…

LLNL researchers uses Additive Manufacturing (AM) to create reinforcing scaffolds that can be integrated with High Explosives (HE) or solid rocket fuel with minimal volume fraction. Its main benefit is to create stability in harsh field conditions.  Its secondary benefit is providing another method to finely tune blast performance or fuel burn. Creating complex shapes with structural…

LLNL researchers have invented an ultrafast PCSS to drive a high-power laser diode with arbitrary pulse widths.  These devices operate by supplying a high voltage (>10 kV) to one side of the switch.  A short pulse of light illuminates the semiconductor, instantly turning it from highly resistive to highly conductive. Ultrawide bandgap (UWBG) semiconductors are used to achieve sub-…

LLNL’s novel approach is to use diamond substrates with the desired donor (nitrogen) and acceptor (boron) impurities.   In order to optically activate these deep impurities, the invention requires at least one externally or internally integrated light source.  The initial exposure to light can set up the desired conduction current, after which the light source could be turned…

Instead of producing individual DSRDs and bonding them, Tunnel DSRD's entire stack structure is grown epitaxially on a n- or p-type silicon wafer, resulting in a novel, “monolithic” stacked DSRD.  A tunnel diode is essentially a diode with very highly doped p and n regions such that the reverse breakdown voltage is 200 meV or lower. 

For cooling a high power device, the novel approach is to use a thermoelectric cooler (TEC)-based embedded substrate with proper selection of the TEC material as an active cooler.  The packaging configuration of TEC allows cooling the entire die without the use of a fluid.  The process is compatible with the thin film TEC material.  Standard semiconductor processes can be used…

For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process.  The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer.  The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual…

The approach is to use Charge Balance Layers (CBLs) to create a superjunction device in wide bandgap materials.  These CBLs enable the device to effectively spread the electric field over 2- or 3-dimensions within a semiconductor voltage sustaining layer instead of 1-dimension, thereby increasing the maximum voltage a device is capable of withstanding.  The challenge of using CBLs is…