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Fabrication of height modulated and tapered features in fused silica

This LLNL invention allows for the fabrication of complex waveplate features and topologies from fused silica, a highly desirable and durable waveplate material.  It also is a unique technique for density multiplication and high-fidelity bidirectional deposition, which can create optical components that are generally for entirely new classes of optical materials.

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Standing in LLNL’s Center for Micro Nano Technology, Nathan Ray holds a marvel of optical engineering, a 5-centimeter metasurface optic

This LLNL invention concerns a method for patterning the index of refraction by fabricating a spatially invariant metasurface, and then apply spatially varied mechanical loading to compress the metasurface features vertically and spread them radially. In doing so, the index of refraction can be re-written on the metasurface, thus enabling index patterning. This process allows rapid 'rewriting…

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SEM image of etched metasurface with angled features

This novel invention specifically enables the fabrication of arbitrarily tailored birefringence characteristics in nano-structured meta-surfaces on non-birefringent substrates (e.g. fused silica). The birefringent nano-structured meta-surface is produced by angled directional reactive ion beam etching through a nano-particle mask. This method enables the simultaneous tailoring of refractive…

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Schematic of one methodology for achieving a thicker substrate engraved meta-surface (SEMS) layer

This invention (US Patent No. 11,294,103) is an extension of another LLNL invention, US Patent No. 10,612,145, which utilizes a thin sacrificial metal mask layer deposited on a dielectric substrate (e.g. fused silica) and subsequently nanostructured through a laser generated selective thermal de-wetting process.

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Scanning electron micrograph of scalable, grating-like nanoscale metal mask (line period ~35 nm)

This invention consists of a method of forming nanoscale metal lines to produce a grating-like mask with wide area coverage over the surface of a durable optical material such as fused silica. Subsequent etching processes transfer the metal mask to the underlying substrate forming a birefringent metasurface. This method enables the production of ultrathin waveplates for high power laser…

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Scanning electron micrograph of bulk metamaterial structures fabricated at LLNL

Heat sensitive materials such as piezoelectric and MEMS devices and assemblies, magnetic sensors, nonlinear optical crystals, laser glass or solid-state laser materials, etc. cannot be exposed to excess temperatures which in the context of this invention, means materials that cannot be exposed to temperatures greater than 50°C (122°F). LLNL’s invention describes a low-temperature method of…

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Custom PCB design of a PCSS Laser Diode Driver

LLNL researchers have invented an ultrafast PCSS to drive a high-power laser diode with arbitrary pulse widths.  These devices operate by supplying a high voltage (>10 kV) to one side of the switch.  A short pulse of light illuminates the semiconductor, instantly turning it from highly resistive to highly conductive. Ultrawide bandgap (UWBG) semiconductors are used to achieve sub-…

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JFET Device Structure

LLNL’s novel approach is to use diamond substrates with the desired donor (nitrogen) and acceptor (boron) impurities.   In order to optically activate these deep impurities, the invention requires at least one externally or internally integrated light source.  The initial exposure to light can set up the desired conduction current, after which the light source could be turned…

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Tunneling Diode between two DSRDs

Instead of producing individual DSRDs and bonding them, Tunnel DSRD's entire stack structure is grown epitaxially on a n- or p-type silicon wafer, resulting in a novel, “monolithic” stacked DSRD.  A tunnel diode is essentially a diode with very highly doped p and n regions such that the reverse breakdown voltage is 200 meV or lower. 

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thermoelectric cooler (TEC) embedded substrate for cooling of high power devices

For cooling a high power device, the novel approach is to use a thermoelectric cooler (TEC)-based embedded substrate with proper selection of the TEC material as an active cooler.  The packaging configuration of TEC allows cooling the entire die without the use of a fluid.  The process is compatible with the thin film TEC material.  Standard semiconductor processes can be used…

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SEM image of a prototype for a neural implant shuttle etched into a non-SOI wafer. The 7:1 (Si:Photoresist) etch selectivity used here allowed for a maximum structure height of 32 μm, with up to 75 steps of 0.4 μm height each. Scale bar 100 μm.

For this method, a Silicon on Insulator (SOI) wafer is used to tailor etch rates and thickness in initial steps of the process.  The simple three step process approach is comprised of grayscale lithography, deep reactive-ion etch (DRIE) and liftoff of the SOI wafer.  The liftoff process is used to dissolve the insulating layer, thus separating sections of the wafer as individual…

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Unique LLNL capabilities enable GaN superjunctions

The approach is to use Charge Balance Layers (CBLs) to create a superjunction device in wide bandgap materials.  These CBLs enable the device to effectively spread the electric field over 2- or 3-dimensions within a semiconductor voltage sustaining layer instead of 1-dimension, thereby increasing the maximum voltage a device is capable of withstanding.  The challenge of using CBLs is…

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Linearly polarized light entering a half-wave plate can be resolved into two waves, parallel and perpendicular to the optic axis of the waveplate ("Waveplate" by Bob Mellish is licensed under CC BY-SA 3.0).

This novel method of producing waveplates from isotropic optical materials (e.g. fused silica) consists of forming a void-dash metasurface using the following process steps: